Volume-1 ~ Issue-1
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | Analysis of Binpacking |
Country | : | India |
Authors | : | Mrs. Nirmala J |
: | 10.9790/0661-0110109 |
ABSTRACT : The main objective of this problem is to pack objects of fixed volume into bins, each of them
having a maximum capacity, so as to minimize the total number of bins used. Binpacking is an Np-complete
problem as the number items increases, to pack the items in n bins, It cannot be done in polynomial time.
Hence we convert the Np problem to P problem in our approach. There are several methods to solve this
problem. The most straightforward solution would be the first fit algorithm. Here each object is compared
against all the bins to try find the first bin which could accommodate the object. Insert a set of n numbers into
as few bins as possible, such that the sum of the numbers assigned to each bin does not exceed the bin
capacity, we firstly prove it to be NP problem and solve as P problem after transformation .
Keywords - NP complete, P complete ,Bin Packing
Keywords - NP complete, P complete ,Bin Packing
Journal Papers:
[1] Garey, M., and Johnson, D. 1979. Computers and Intractability: A Guide to the Theory of NP-Completeness. San Francisco: W.H. Freeman.
[2] Martello, S., and Toth, P. 1990a. Bin-packing problem. In Knapsack Problems: Algorithms and Computer Implemen-tations. Wiley. chapter 8, 221–245.
[3] Martello, S., and Toth, P. 1990b. Lower bounds and reduction procedures for the bin packing problem. Discrete Applied.
[4] Mathematics 28:59–70.
[1] Garey, M., and Johnson, D. 1979. Computers and Intractability: A Guide to the Theory of NP-Completeness. San Francisco: W.H. Freeman.
[2] Martello, S., and Toth, P. 1990a. Bin-packing problem. In Knapsack Problems: Algorithms and Computer Implemen-tations. Wiley. chapter 8, 221–245.
[3] Martello, S., and Toth, P. 1990b. Lower bounds and reduction procedures for the bin packing problem. Discrete Applied.
[4] Mathematics 28:59–70.
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | Buffer Overflow Attack |
Country | : | India |
Authors | : | Samanvay Gupta |
: | 10.9790/0661-0111023 | |
ABSTRACT: Exploits, vulnerabilities, and buffer-overflow techniques have been used by malicious hackers and virus writers for a long time. In order to attack and get the remote root privilege, using buffer overflow and suidprogram has become the commonly used method for hackers. This paper include vast idea and information regarding the buffer overflow as history of Vulnerabilities, buffers, stack, registers, Buffer Overflow Vulnerabilities and Attacks, current buffer over flow, Shell code, Buffer Overflow Issues, the Source of the Problem, prevention/detection of Buffer Overflow attacks and Finally how to react towards Buffer Overflows. The objective of this study is to take one inside the buffer overflow attack and bridge the gap between the "descriptive account" and the "technically intensive account"
[1] Michele Crabb. Curmudgeon‟s Executive Summary. In Michele Crabb, editor, The SANS Network SecurityDigest. SANS, 1997. Contributing Editors: Matt Bishop, Gene Spafford, Steve Bellovin, Gene Schultz, Rob Kolstad, Marcus Ranum, Dorothy Denning, Dan Geer, Peter Neumann, Peter Galvin, David Harley, JeanChouanard.
[2] "Aleph One". Smashing The Stack For Fun And Profit. Phrack, 7(49), November 1996.
[3] "Mudge". How to Write Buffer Overflows. http:// l0pht.com/advisories/bufero.html,1997.
[4] Nathan P. Smith. Stack Smashing vulnerabilities in the UNIX Operating System. http://millcomm.com/ nate/machines/security/stack-smashing/natebuffer.ps, 1997.
[5] "DilDog". The Tao of Windows Buffer Overflow.http://www.cultdeadcow.com/cDc_files/cDc-351/, April 1998.
[6] klog. The frame pointer overwrite. Phrack Magazine, 55(9), 1999.
[7] Aleph One. Smashing the stack for fun and pro_t. Phrack Magazine, 49(14), 1996.
[8] C. Cowan, C. Pu, D. Maier, H. Hinton, J. Walpole, P. Bakke,S. Beattie, A. Grier, P. Wagle, and Q. Zhang, "Stackguard:Automatic Adaptive Detection and Prevention of Buffer-Overflow Attacks," Proc. Seventh USENIX Security Symp.(Security ‟98), Jan. 1998
[9] T. ckerChiueh and F.-H. Hsu, "Rad: A Compile-Time Solution toBuffer Overflow Attacks," Proc. 21st Int‟l Conf. DistributedComputing Systems (ICDCS), 2001.
[10] R. Chinchani and E.V.D. Berg, "A Fast Static Analysis Approach to Detect Exploit Code inside Network Flows," Proc. Eighth Int‟l Symp.Recent Advances in Intrusion Detection (RAID), 2005.
[2] "Aleph One". Smashing The Stack For Fun And Profit. Phrack, 7(49), November 1996.
[3] "Mudge". How to Write Buffer Overflows. http:// l0pht.com/advisories/bufero.html,1997.
[4] Nathan P. Smith. Stack Smashing vulnerabilities in the UNIX Operating System. http://millcomm.com/ nate/machines/security/stack-smashing/natebuffer.ps, 1997.
[5] "DilDog". The Tao of Windows Buffer Overflow.http://www.cultdeadcow.com/cDc_files/cDc-351/, April 1998.
[6] klog. The frame pointer overwrite. Phrack Magazine, 55(9), 1999.
[7] Aleph One. Smashing the stack for fun and pro_t. Phrack Magazine, 49(14), 1996.
[8] C. Cowan, C. Pu, D. Maier, H. Hinton, J. Walpole, P. Bakke,S. Beattie, A. Grier, P. Wagle, and Q. Zhang, "Stackguard:Automatic Adaptive Detection and Prevention of Buffer-Overflow Attacks," Proc. Seventh USENIX Security Symp.(Security ‟98), Jan. 1998
[9] T. ckerChiueh and F.-H. Hsu, "Rad: A Compile-Time Solution toBuffer Overflow Attacks," Proc. 21st Int‟l Conf. DistributedComputing Systems (ICDCS), 2001.
[10] R. Chinchani and E.V.D. Berg, "A Fast Static Analysis Approach to Detect Exploit Code inside Network Flows," Proc. Eighth Int‟l Symp.Recent Advances in Intrusion Detection (RAID), 2005.
- Citation
- Abstract
- Reference
- Full PDF
ABSTRACT:Location aided routing protocol (LAR) is an on demand protocol in MANET which uses GPS in mobile nodes to find the location of node. It calculates routing when it is needed. LAR protocol has two zones namely expected zone and request zone. The expected zone is circular in shape while request zone is rectangular in shape. Expected zone is determined according to the location of destination and request zone is determined according to the location of source node. When communication starts between sources to destination, the node is not within expected zone; packet is dropped. Therefore, packet is lost or destroyed. This paper proposed a method for dropped packet which randomly checks exactly how many packets is dropped during transmission. This paper proposed an algorithm for wireless LAN.
Keywords: Expected zone, GPS, MANET, Request zone, Wireless LAN.
Keywords: Expected zone, GPS, MANET, Request zone, Wireless LAN.
[1] Tracy Camp, Jeff Boleng, Brad Williams, Lucas Wilcox, William Navidi, "Performance Comparison of Two Location Based Routing Protocols for Ad Hoc Networks", Proceedings of the 21st Annual Joint Conference of the IEEE Computer and Communications Societies (INFOCOM 2002), pages 1678-1687, 2002.
[2] http://webhome.csc.uvic.ca/~wkui/Courses/wireless/Lecture4.pdf.
[3] Young Bae Ko. and Nitin H. Vaidya, "Location-Aided Routing (LAR) in mobile ad hoc networks", in Proc. 4th annual ACM/IEEE international conference on Mobile computing and networking, 1998.
[4] Young Bae Ko. , Nitin H. Vaidya, "Location-Aided Routing (LAR) in mobile ad hoc networks" Wireless Networks,Vo. 6 issue 4 pp. 307-321,July 2000.
[5] Angajala Srinivasa Rao, Somu Ventateswarku, Gogineni Rajesh Chandra, " LAR Protocol for Ad Hoc Wireless Networks using GPS", March 2009.
[6] V. Hnatyshin, M. Ahmed, R. Cocco, D. Urbano, "A comparative study of location aided routing protocols for MANET" , Wireless Days (WD), IFIP 2011.
[7] F. De Rango, A. Iera, A. Molinaro, S. Marano, "Multi-step increase of the forwarding zone for LAR protocol in ad hoc networks", Proceeding of the 57th IEEE Semiannual Vehicular Technology Conference(2003), Vol. 1, pp. 186 – 190, 2003.
[8] F. De Rango, A. Iera, A. Molinaro, S. Marano, "A modified location-aided routing protocol for the reduction of control overhead in ad-hoc wireless networks" Proceeding of 10th international Conference on Telecommunications (2003), Vol. 2, pp. 1033-1037, 2003.
[9] H. Al-Bahadili, " LAR-1P: An Efficient Hybrid Route Discovery Algorithm for MANETs", Proceeding of the 5th International Workshop on Performance Evaluation for Wireless Ad Hoc, Sensor, and Ubiquitous Networks (PE-WASUN 2008), 2008.
[10] Dipankar Deb, Srijita Barman Roy, and Nabendu Chaki, "LACBER: A New Location Aided Routing Protocol For GPS Scarce MANET", International Journal of Wireless & Mobile Networks (IJWMN), Vol 1, No 1, August 2009.
[2] http://webhome.csc.uvic.ca/~wkui/Courses/wireless/Lecture4.pdf.
[3] Young Bae Ko. and Nitin H. Vaidya, "Location-Aided Routing (LAR) in mobile ad hoc networks", in Proc. 4th annual ACM/IEEE international conference on Mobile computing and networking, 1998.
[4] Young Bae Ko. , Nitin H. Vaidya, "Location-Aided Routing (LAR) in mobile ad hoc networks" Wireless Networks,Vo. 6 issue 4 pp. 307-321,July 2000.
[5] Angajala Srinivasa Rao, Somu Ventateswarku, Gogineni Rajesh Chandra, " LAR Protocol for Ad Hoc Wireless Networks using GPS", March 2009.
[6] V. Hnatyshin, M. Ahmed, R. Cocco, D. Urbano, "A comparative study of location aided routing protocols for MANET" , Wireless Days (WD), IFIP 2011.
[7] F. De Rango, A. Iera, A. Molinaro, S. Marano, "Multi-step increase of the forwarding zone for LAR protocol in ad hoc networks", Proceeding of the 57th IEEE Semiannual Vehicular Technology Conference(2003), Vol. 1, pp. 186 – 190, 2003.
[8] F. De Rango, A. Iera, A. Molinaro, S. Marano, "A modified location-aided routing protocol for the reduction of control overhead in ad-hoc wireless networks" Proceeding of 10th international Conference on Telecommunications (2003), Vol. 2, pp. 1033-1037, 2003.
[9] H. Al-Bahadili, " LAR-1P: An Efficient Hybrid Route Discovery Algorithm for MANETs", Proceeding of the 5th International Workshop on Performance Evaluation for Wireless Ad Hoc, Sensor, and Ubiquitous Networks (PE-WASUN 2008), 2008.
[10] Dipankar Deb, Srijita Barman Roy, and Nabendu Chaki, "LACBER: A New Location Aided Routing Protocol For GPS Scarce MANET", International Journal of Wireless & Mobile Networks (IJWMN), Vol 1, No 1, August 2009.
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | Token Sequencing Approach to Prevent SQL Injection Attacks |
Country | : | India |
Authors | : | ManveenKaur, Arun Prakash Agrawal |
: | 10.9790/0661-0113137 | |
Abstract : Internet, the network of networks represents an insecure channel for exchanging information leading to a high risk of intrusion or fraud. Many web applications remain under the attack of hackers who intentionally try to access secret information stored at the backend database by circumventing its security system. One of the major approaches followed to perform these attacks is with the help of SQL Injection (SQLI) or (SQLIA). SQL injection is a technique used to attack databases through a website. It is a form of attack that comes from user input that has not been checked to see if it is valid. SQL injection is the subset of code which is not verified by the backend server and the aim is to run that code to derive the secret information.[1]. In this papera method is proposed in which two approaches, one static in which the database is created and another dynamic in which the query structure against the previously stored query structure is compared. If the two structures match then search is stopped and query is regarded as a valid query. The Algorithm has been developed in JAVA.
Keywords-Group, Malicious, SQLIA, Token, Vulnerability
Keywords-Group, Malicious, SQLIA, Token, Vulnerability
[1] http://en.wikipedia.org/wiki/SQL-injection
[2] http://www.unixwiz.net/techtips/sql-injection.html
[3] http://cwe.mitre.org/documents/vuln-trends.html
[4] http://ferruh.mavituna.com/sql-injection-cheatsheet
[5] Preventing sql injection attacks Using AMNESIA William G.J Halfondand Alessandro Orso Georgia Institute of Technology. www.cc.gatech.edu/orso/papers/halfond.orso.ICSEDEM006.Presentation.pdf
[2] http://www.unixwiz.net/techtips/sql-injection.html
[3] http://cwe.mitre.org/documents/vuln-trends.html
[4] http://ferruh.mavituna.com/sql-injection-cheatsheet
[5] Preventing sql injection attacks Using AMNESIA William G.J Halfondand Alessandro Orso Georgia Institute of Technology. www.cc.gatech.edu/orso/papers/halfond.orso.ICSEDEM006.Presentation.pdf
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | Evolution of Cloud Storage as Cloud Computing Infrastructure Service |
Country | : | India |
Authors | : | R. Arokia Paul Rajan, S. Shanmugapriyaa |
: | 10.9790/0661-0113845 |
Abstract : Enterprises are driving towards less cost, more availability, agility, managed risk - all of which is accelerated towards Cloud Computing. Cloud is not a particular product, but a way of delivering IT services that are consumable on demand, elastic to scale up and down as needed, and follow a pay-for-usage model. Out of the three common types of cloud computing service models, Infrastructure as a Service (IaaS) is a service model that provides servers, computing power, network bandwidth and Storage capacity, as a service to their subscribers. Cloud can relate to many things but without the fundamental storage pieces, which is provided as a service namely Cloud Storage, none of the other applications is possible. This paper introduces Cloud Storage, which covers the key technologies in cloud computing and Cloud Storage, management insights about cloud computing, different types of cloud services, driving forces of cloud computing and cloud storage, advantages and challenges of cloud storage and concludes by pinpointing few challenges to be addressed by the cloud storage providers.
Key words: Cloud Computing, Cloud Storage, Cloud Storage API, IaaS, issues, reference model.
Key words: Cloud Computing, Cloud Storage, Cloud Storage API, IaaS, issues, reference model.
Journal Papers:
[1] Daniel J. Abadi, Data Management in the Cloud: Limitations and Opportunities, IEEE Data Engineering Bulletin, Volume 32, March 2009, 3-12.
[2] James Broberg, Rajkumar Buyya, Zahir Tari, MetaCDN: Harnessing "Storage Clouds‟ for high performance content delivery, Journal of Network and Computer Applications, 1012–1022, 2009.
Books:
[3] Eric A. Marks, Bob Lozano, Executive's Guide to Cloud Computing (John Wiley & Sons Inc, pp. 25-40, 2010).
[4] Anthony T. Velte, Toby J. Velte, Robert Elsenpeter, Cloud Computing: A Practical Approach (McGraw Hill Publications, pp 135 – 144, 2010).
[5] Linda Xu, Miklos Sandorfi and Tanya Loughlin, Cloud Storage for Dummies (Wiley Publishing, pp. 5-24, 2010).
[6] Wu Jiyi,Ping Lingdi,Pan Xuezeng.Cloud Computing: Concept and Platform,Telecommunications Science,12:23-30, 2009.
[7] Storage Networking Industry Association.Cloud Storage Reference Model,Jun.2009.
Thesis:
[8] Srikumar Venugopal, Scheduling Distributed Data-Intensive Applications on Global Grids, Doctoral diss., Department of Computer Science and Software Engineering, The University of Melbourne, Australia, July 2006.
Proceedings Papers:
[9] Nicolas Bonvin, Thanasis G. Papaioannou and Karl Aberer, A Self-organized, Fault-tolerant and Scalable replication scheme for Cloud storage, SoCC '10 Proceedings of the 1st ACM symposium on Cloud computing, New York, USA, 2010, 205-216.
[10] Wenying Zeng, Yuelong Zhao, Kairi Ou, Wei Song, Research on cloud storage architecture and key technologies, ICIS '09: Proceedings of the 2nd International Conference on Interaction Sciences: Information Technology, Culture and Human, ACM New York, NY, USA, 2009, 1044-1048.
[1] Daniel J. Abadi, Data Management in the Cloud: Limitations and Opportunities, IEEE Data Engineering Bulletin, Volume 32, March 2009, 3-12.
[2] James Broberg, Rajkumar Buyya, Zahir Tari, MetaCDN: Harnessing "Storage Clouds‟ for high performance content delivery, Journal of Network and Computer Applications, 1012–1022, 2009.
Books:
[3] Eric A. Marks, Bob Lozano, Executive's Guide to Cloud Computing (John Wiley & Sons Inc, pp. 25-40, 2010).
[4] Anthony T. Velte, Toby J. Velte, Robert Elsenpeter, Cloud Computing: A Practical Approach (McGraw Hill Publications, pp 135 – 144, 2010).
[5] Linda Xu, Miklos Sandorfi and Tanya Loughlin, Cloud Storage for Dummies (Wiley Publishing, pp. 5-24, 2010).
[6] Wu Jiyi,Ping Lingdi,Pan Xuezeng.Cloud Computing: Concept and Platform,Telecommunications Science,12:23-30, 2009.
[7] Storage Networking Industry Association.Cloud Storage Reference Model,Jun.2009.
Thesis:
[8] Srikumar Venugopal, Scheduling Distributed Data-Intensive Applications on Global Grids, Doctoral diss., Department of Computer Science and Software Engineering, The University of Melbourne, Australia, July 2006.
Proceedings Papers:
[9] Nicolas Bonvin, Thanasis G. Papaioannou and Karl Aberer, A Self-organized, Fault-tolerant and Scalable replication scheme for Cloud storage, SoCC '10 Proceedings of the 1st ACM symposium on Cloud computing, New York, USA, 2010, 205-216.
[10] Wenying Zeng, Yuelong Zhao, Kairi Ou, Wei Song, Research on cloud storage architecture and key technologies, ICIS '09: Proceedings of the 2nd International Conference on Interaction Sciences: Information Technology, Culture and Human, ACM New York, NY, USA, 2009, 1044-1048.
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | Design and Analysis of 16 Bit Reversible ALU |
Country | : | India |
Authors | : | Lekshmi Viswanath, Ponni.M |
: | 10.9790/0661-0114653 |
Abstract- Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. Reversibility plays an important role when energy efficient computations are considered. Reversible logic is used to reduce the power dissipation that occurs in classical circuits by preventing the loss of information. This paper proposes a reversible design of a 16 bit ALU. This ALU consists of eight operations, three arithmetic and five logical operations. The arithmetic operations include addition, subtraction, multiplication and the logical operations include NAND, AND, OR, NOT and XOR. All the modules are being designed using the basic reversible gates. The power and delay analysis of the various sub modules is performed and a comparison with the traditional circuits is also carried out.
Key words: Reversible logic circuits, Reversible logic gates, Reversible adder/subtractor, Reversible logic unit, Reversible ALU.
Key words: Reversible logic circuits, Reversible logic gates, Reversible adder/subtractor, Reversible logic unit, Reversible ALU.
Journal paper
[1] Landauer, R., "Irreversibility and heat generation in the computing process", IBM J. Research and Development, vol. 5 (3): pp. 183-191, 1961.
[2] Bennett, C.H., "Logical reversibility of computation", IBM J. Research and Development, vol. 17: pp. 525-532, 1973
[3] Ravish Aradhya H V, Praveen Kumar B V, Muralidhara K N "Design of Control unit for Low Power ALU Using Reversible Logic" International Journal of Scientific & Engineering Research Volume 2, Issue 9, September-2011.
[4] B. Raghu Kanth1, B. Murali Krishna2, G. Phani Kumar3, J. Poornima4, K. Siva Rama Krishna "A Comparitive Study Of Reversible Logic Gates"International Journal of VLSI & Signal Processing Applications, Vol.2,Issue 1, Feb 2012,
Conference papers
[5] Himanshu Thapliyal ,Nagarajan Ranganathan "A New Reversible Design of BCD Adder" IEEE conference on Design and automation, 2011 pp.1-4.
[6] Zhijin Guan, Wenjuan Li, Weiping Ding, Yueqin Hang, Lihui Ni"An Arithmetic Logic Unit design based on reversible logic gates "IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PacRim), 2011.
[7] Thapliyal H, Srinivas M.B, "Novel Reversible TSG Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU,"Fifth International Conference on Information, Communications and Signal Processing, 2006.
[8] Madhusmita,SisiraKanta,JagannathSatpathy,MerajSaheeL"Design of Arithmetic Circuits Using Reversible Logic Gates and Power Dissipation Calculation"2010 International Symposium on Electronic System Design, Dec 2010, pp 85-90.
[9] H.Thapliyal,M.B Srinivas "Novel design and reversible logic synthesis of multiplexer based full adder and multipliers" 48th Midwest Symposium on Circuits and Systems, 2005.
[10] Matthew Morrison, Matthew Lewandowski, Richard Meana, Nagarajan Ranganathan, "Design of a novel reversible ALU using an enhanced carry look- ahead adder" 11th IEEE Conference on Nanotechnology (IEEE-NANO), 2011
[1] Landauer, R., "Irreversibility and heat generation in the computing process", IBM J. Research and Development, vol. 5 (3): pp. 183-191, 1961.
[2] Bennett, C.H., "Logical reversibility of computation", IBM J. Research and Development, vol. 17: pp. 525-532, 1973
[3] Ravish Aradhya H V, Praveen Kumar B V, Muralidhara K N "Design of Control unit for Low Power ALU Using Reversible Logic" International Journal of Scientific & Engineering Research Volume 2, Issue 9, September-2011.
[4] B. Raghu Kanth1, B. Murali Krishna2, G. Phani Kumar3, J. Poornima4, K. Siva Rama Krishna "A Comparitive Study Of Reversible Logic Gates"International Journal of VLSI & Signal Processing Applications, Vol.2,Issue 1, Feb 2012,
Conference papers
[5] Himanshu Thapliyal ,Nagarajan Ranganathan "A New Reversible Design of BCD Adder" IEEE conference on Design and automation, 2011 pp.1-4.
[6] Zhijin Guan, Wenjuan Li, Weiping Ding, Yueqin Hang, Lihui Ni"An Arithmetic Logic Unit design based on reversible logic gates "IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PacRim), 2011.
[7] Thapliyal H, Srinivas M.B, "Novel Reversible TSG Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU,"Fifth International Conference on Information, Communications and Signal Processing, 2006.
[8] Madhusmita,SisiraKanta,JagannathSatpathy,MerajSaheeL"Design of Arithmetic Circuits Using Reversible Logic Gates and Power Dissipation Calculation"2010 International Symposium on Electronic System Design, Dec 2010, pp 85-90.
[9] H.Thapliyal,M.B Srinivas "Novel design and reversible logic synthesis of multiplexer based full adder and multipliers" 48th Midwest Symposium on Circuits and Systems, 2005.
[10] Matthew Morrison, Matthew Lewandowski, Richard Meana, Nagarajan Ranganathan, "Design of a novel reversible ALU using an enhanced carry look- ahead adder" 11th IEEE Conference on Nanotechnology (IEEE-NANO), 2011
- Citation
- Abstract
- Reference
- Full PDF
Paper Type | : | Research Paper |
Title | : | JTAG Architecture with Multi Level Security |
Country | : | India |
Authors | : | Pooja Ajay Kumar, P. Sathish Kumar, Aditi Patwa |
: | 10.9790/0661-0115459 |
Abstract: For in–circuit testing and debugging JTAG (Joint Test Access Group) is one of the most powerful standard architecture of DFT (Design For Testability). But JTAG can also act as a tool for hacking and hence makes the devices vulnerable for attacks. This paper presents a Security mechanism for JTAG and hence prevents the unauthorized users from accessing the private and confidential information of a device. This method is highly compatible with the IEEE 1149.1 standard and requires no modification in the Intellectual Property of an IC. In this paper the standard JTAG Architecture with enhanced security mechanism is described using VHDL.
Keywords- JTAG, DFT, Boundary Scan, Security, AES, Authorization, Privilege Levels.
Keywords- JTAG, DFT, Boundary Scan, Security, AES, Authorization, Privilege Levels.
Standards
[1] IEEE Standard Test Access Port and Boundary Scan Architecture. IEEE Standard 1149.1, 2001.
Journal Paper
[2] Kurt Rosenfeld and Ramesh Karri, Attacks and Defenses for JTAG, Design and Test of Computers, IEEE. 2009.
Conference Papers
[3] Luke Pierce and Spyros Tragoudas, Multi-Level Secure JTAG Architecture, IEEE 17th International On-Line Testing Symposium, Pages 208-209, 2011
[4] R.F. Buskey and B.B. Frosik. Protected jtag. In International Conference on Parallel Processing Workshops, 2006, pages 8 pp.–414, 2006.
Proceeding Papers
[5] Chih-Chung Lu and Shau-Yin Tseng, "Integrated Design of AES Encrypter and Decrypter", Proc. IEEE Int. Conf. on Application-Specific Sytems, Architectures, and Processors, (ASAP'02), pp. 277-285, 2002.
Chapters in Books
[6] J. Menezes, P. C. van Oorschot and S. A. Vanstone, Handbook of Applied Cryptography, (CRC Press LLC., 1997).
[1] IEEE Standard Test Access Port and Boundary Scan Architecture. IEEE Standard 1149.1, 2001.
Journal Paper
[2] Kurt Rosenfeld and Ramesh Karri, Attacks and Defenses for JTAG, Design and Test of Computers, IEEE. 2009.
Conference Papers
[3] Luke Pierce and Spyros Tragoudas, Multi-Level Secure JTAG Architecture, IEEE 17th International On-Line Testing Symposium, Pages 208-209, 2011
[4] R.F. Buskey and B.B. Frosik. Protected jtag. In International Conference on Parallel Processing Workshops, 2006, pages 8 pp.–414, 2006.
Proceeding Papers
[5] Chih-Chung Lu and Shau-Yin Tseng, "Integrated Design of AES Encrypter and Decrypter", Proc. IEEE Int. Conf. on Application-Specific Sytems, Architectures, and Processors, (ASAP'02), pp. 277-285, 2002.
Chapters in Books
[6] J. Menezes, P. C. van Oorschot and S. A. Vanstone, Handbook of Applied Cryptography, (CRC Press LLC., 1997).