iosr-JECE   Volume-2 ~ Issue-1

Abstract : Dual edge triggering is an emerging effective method for reducing the power consumption in the clock distribution network. This paper compares three existing design of dual edge triggered flip-flop EP_CDFF, EP_CPFF and DET-SAFF with the proposed design of the dual edge triggered flip-flop (DET-FF). The design eliminates the redundant transitions of internal nodes when current data is same as the previous one using conditional technique and also to disable the clock when the input invokes no output changes provide a control circuit. The design significantly reduces the power dissipation. Various TSPICE simulation with different input sequences show that reduction in power is 15.25% of those of the prior art. The design has been simulated using Tanner 13.0 EDA tool with 0.35 μm technology at 25°C temperature
Keywords - Clock Distribution Network, Transmission Gate, Pulse Generator, Conditional Precharge, Conditional Discharge, Sense Amplifier

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[2] Wai Chung, Timothy Lo, and Manoj Sachdev, "A Comparative Analysis of Low-Power Low-Voltage Dual-Edge-Triggered Flip-Flops", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 10, No. 6, pp. 913-918, December 2002
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[8] Yu Chien-Cheng, "Low-Power Double Edge Triggered Flip-Flop Circuit Design", Intetnational Conference on Innovative Computing Information and Control (ICICIC), pp. 566-570.
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[12] Myint Wai Phyu, Kangkang Fu, Wang Ling Goh,et.al. "Power Efficient Explicit Pulsed Dual Edge Triggered Sense Amplifier Flip-Flops", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 1, pp. 1-9, Jan 2011.

Abstrac : Motion estimation is a common element in many video processing algorithms, serving as a valuable way to capture the spatial-temporal correlation in video signals. However, the robustness of motion estimation often suffers from problems such as ambiguities of motion trajectory (i.e. the aperture problem) and illumination variances. In this paper, we explore a new framework for video processing based on the recently proposed wavelet transform with SPIHT algorithm and fast implementations of arithmetic coding, which achieve optimal compression and higher throughput by better exploiting the great numerical capabilities of the current processors. Also, Instead of containing an explicit motion estimation step, the wavelet transform provides motion-selective sub band decomposition for video signals. We proposed a new and different approach for based on set partitioning in hierarchical trees (SPHIT) and arithmetic coding which provides better performance than the previous approaches. The result is calculated by comparing the actual video size and compressed video size, after decoding using proposed technique.
Keywords-Motion Estimation, Wavelet Transform, SPIHT, Arithmetic Coding,

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