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Version-1 Version-2 Version-5 Version-4
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Paper Type | : | Research Paper |
Title | : | Real Time Implementation of Computer Vision Algorithms on Beagleboard |
Country | : | India |
Authors | : | Pradeep Kumar M., Lokesha H. |
: | 10.9790/4200-04230106 |
Keywords: Real-time image processing, Computer Vision, Sobel edge detection, Median filter.
[2] BeagleBoard-xM Rev C system Reference Manual,Revision 1.0,April 4, 2010 Oct.
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Keywords: Active resistors, Aspect ratio, Bulk effect, Saturation region, Voltage divider.
[2] Designing low frequency IC filter using pseudo resistor for Biopotential measurements - A thesis presented by Nazanin Neshatvar presented to the faculty of the American university of Sharjah College of Engineering.
[3] A CMOS Power-Efficient Low-Noise Current-Mode Front-End Amplifier for Neural Signal Recording by Chung-Yu Wu, Fellow, IEEE, Wei-MingChen, Student Member, IEEE, and Liang-Ting Kuo.
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Paper Type | : | Research Paper |
Title | : | Memory less Rotation Based BIST with Low Area Overhead |
Country | : | India |
Authors | : | Drusya J. U., S. Prabu Venkateswaran |
: | 10.9790/4200-04231217 |
Keywords: BIST, Circular Shift Register, Circuit Under Test, Self Feedback Logic.
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Index Terms: Digital image correlation(DIC), edge detection, strain analysis, Universal Testing Machine(UTM)
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Paper Type | : | Research Paper |
Title | : | Design and Analysis of Low Power Comparator Using Switching Transistors |
Country | : | India |
Authors | : | Monica Rose Joy, Thangamani M. |
: | 10.9790/4200-04232530 |
Keywords: Double tail comparator, dynamic clocked comparator, high speed analog to digital converters, low power analog design, switching transistor.
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Keywords: Area, VLSI, Self-resetting logic (SRL), Full adder, High speed adders.
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Paper Type | : | Research Paper |
Title | : | Power Efficient adder Cell For Low Power Bio Medical Devices |
Country | : | India |
Authors | : | V. Anandi, Dr. R. Rangarajan, M. Ramesh |
: | 10.9790/4200-04233945 |
Keywords: Column compression , full adder, low power, multipliers, SERF, TG Adder, VLSI circuit.
[2] Eng Sue Chew, MyintWaiPhyu, and Wang Ling Goh, "Ultra Low-Power Full-Adder for Biomedical Applications", IEEE International Conference of Electron Devices and Solid-State Circuits, 2009. pp115 – 1182, 5-27 Dec. 2009.
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Paper Type | : | Research Paper |
Title | : | Modified Toll Gate System with Enhanced Security Using FPGA |
Country | : | India |
Authors | : | D.Punniamoorthy , Mr.P.Vimal Kumar, M.E |
: | 10.9790/4200-04235261 |
[2] Manish Buhptani, Shahram Moradpour, "RFID Field Guide - Developing Radio Frequency Identification Systems", Prentice Hall, 2005, pp 7-9, 16-225, 160, 231
[3] Raj Bridgelall, Senior Member, IEEE, " Introducing a Micro-wireless Architecture for Business Activity Sensing ", IEEE International Conference RFID, April 16-17,2008
[4] Sewon Oh, Joosang Park, Yongioon Lee, "RFID-based Middleware System for Automatic Identification", IEEE International Conference on Service Operations and Logistics, and Information, 2005
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[2]. C. Quince, A. Lanzen, R. J. Davenport, and P. J. Turnbaugh, "Removing noise from pyrosequenced amplicons," BMC bioinformatics, vol. 12, p. 38, 2011.
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[4]. R. K. Thenua and S. Agarwal, "Simulation and Performance Analyasis of Adaptive Filter in Noise Cancellation," International Journal of Engineering Science and Technology, vol. 2, pp. 4373-4378, 2010.
[5]. S. Griffin, A. Weston, and J. Anderson, "Adaptive noise cancellation system for low frequency transmission of sound in open fan aircraft," Shock and Vibration, vol. 20, pp. 989-1000, 2013..
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ABSTRACT: The work in this paper is focused on designing a NBTI tolerant 6T SRAM cell while maintaining low power operation. We explore the usefulness of switched capacitor circuit to provide NBTI tolerance while reducing overall power consumption. A thorough analysis of the 6T SRAM cell has been done to show the reduction in power consumption of the cell without degrading the read and write stability. The results obtained in proposed technique are compared and contrasted with reported data for the validation of our approach. The proposed technique reduces read power by 32%, write power by 15% and leakage power by 14%. The applied technique effectively reduces overall current by considerable amount and also significant reduction in Vth degradation due to NBTI is observed hence it is suitable for NBTI tolerant low power 6T SRAM cell design.
Keywords: NBTI, Low Power, 6T SRAM cell, Switched capacitor, SNM.
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Paper Type | : | Research Paper |
Title | : | Baseline wander Removal in ECG using an efficient method of EMD in combination with wavelet |
Country | : | India |
Authors | : | Abdul Qayoom Bhat |
: | 10.9790/4200-04237681 |
ABSTRACT: ECG signal processing is a challenging field which has to deal with several issues. ECG, electrocardiogram plays a vital role in the diagnosis of heart related problems. Good quality ECG is used by the doctors for identification of physiological and pathological phenomena. ECG is very sensitive in nature and even if small amount of noise interferes with it, the characteristics of the signal change.
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Paper Type | : | Research Paper |
Title | : | Fractal Video Compression using Block Matching Motion Estimation - A Study |
Country | : | India |
Authors | : | Rakhi Ashok Aswani, Prof.S. D. Kamble |
: | 10.9790/4200-04238290 |
Index Terms: fractal video compression, motion detection, motion estimation, partitioning scheme, key issues, performance measures.
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Paper Type | : | Research Paper |
Title | : | NBTI and Process Variation Circuit Design Using Adaptive Body Biasing |
Country | : | India |
Authors | : | A .Suvarnamma, M .Rajashekar |
: | 10.9790/4200-04239198 |
Index Terms: Adaptive Body Bias (ABB), Forward Body Bias (FBB), Negative Bias Temperature Instability (NBTI), Process Variation, VLSI.
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